Samsung Considers Chip Test Line in Japan for Advanced Chip Packaging – Sources

Reuters file photo
A man uses a phone below a Samsung sign, during the GSMA’s 2023 Mobile World Congress (MWC) in Barcelona on March 1.

TOKYO/SEOUL (Reuters) — South Korea’s Samsung Electronics Co. is considering setting up a chip test line in Japan, five people said, to bolster its advanced packaging business and forge closer ties with Japanese makers of semiconductor equipment and materials.

It would be the first such test line in Japan for Samsung, the world’s largest maker of memory chips.

It would also come as the United States increasingly urges allies to work together to counter China’s rising might in chips and advanced technology.

Japan said on Friday it would restrict exports of 23 types of chip-making tools, aligning its technology trade controls with a U.S. push to curb China’s ability to make advanced chips.

Samsung is looking to establish the facility in Kanagawa prefecture, near Tokyo, where it already has a research and development (R&D) center, according to four of the people, all of whom declined to be identified because the information is not public.

Although details have not been finalized, including the timing, the investment would likely be in the tens of billions of yen ($75 million), one of the people said.

Samsung is looking to deepen cooperation with Japanese companies, two of the people said. Japan is attractive because of relatively low labor costs and the presence of leading chip equipment and materials makers, allowing Samsung access to a local “ecosystem,” one of them said.

However, one of the people said deliberations were still in an early stage, adding the South Korean company was considering various options and nothing has been decided.

Samsung declined to comment.

Companies are racing to develop advanced packaging techniques, which involve placing chips with different functions into a single package, to enhance overall capabilities and limit the added cost of more advanced chips.

This three-dimensional packaging could also help manufacturers improve chip performance even as they push the physical limits of how small chip features can get.

The test line would involve the so-called back-end process of chipmaking, according to the five people, which refers to a process in which semiconductors are cut and assembled into products.

South Korean President Yoon Suk Yeol this month made the first visit to Japan by a South Korean leader in 12 years, where he met business leaders from both countries.

Executives from the two U.S. allies pledged to work more closely on chips and technology. Washington has worked to improve commercial diplomacy with both countries, particularly focusing on chips, in an attempt to counter China.

Taiwan Semiconductor Manufacturing Co. (TSMC), the world’s largest contract chipmaker, last year opened a research center in Japan’s Tsukuba city, northeast of Tokyo, at a cost of about 37 billion yen, with 19 billion yen of that coming from the Japanese government.

The TSMC facility includes a production line for research.

Samsung last year set up an advanced packaging team in South Korea. Separately, it said this month it expected to invest $230 billion over the next 20 years to develop a large chip-making base in the country.